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  1/11 october 2004 this is preliminary information on a new product foreseen to be developed. details are subject to change without notice. VNQ500PEP-E quad channel high side driver rev. 1 table 1. general features n cmos compatible i/os n chip enable n junction overtemperature protection and diagnostic n current limitation n shorted load protection n undervoltage shutdown n protection against loss of ground n very low stand-by current n in compliance with the 2002/95/ec european directive description the VNQ500PEP-E is a monolithic device designed in stmicroelectronics vipower m0-3 technology, intended for driving any kind of load with one side connected to ground. active current limitation combined with latched thermal shutdown, protect the device against overload. figure 1. package in case of overtemperature of one channel the relative i/o pin is pulled down. device automatically turns off in case of ground pin disconnection. table 2. order codes typ e r ds(on) i out v cc VNQ500PEP-E 500 m w 0.4 a 36v powersso-12 package tube tape and reel powersso-12 VNQ500PEP-E vnq500peptr-e target specification
VNQ500PEP-E 2/11 figure 2. block diagram table 3. pin definitions and functions pin no symbol function tab v cc positive power supply voltage 7,12 v cc positive power supply voltage 1 gnd logic ground 2 ce chip enable 3 i/o 1 input/output of channel 1 4 i/o 2 input/output of channel 2 5 i/o 3 input/output of channel 3 6 i/o 4 input/output of channel 4 8 output 4 high-side output of channel 4 9 output 3 high-side output of channel 3 10 output 2 high-side output of channel 2 11 output 1 high-side output of channel 1 v cc i/o 1 output 1 i/o 2 i/o 3 i/o 4 output 2 output 3 output 4 logic junction temp. detection undervoltage detection clamp power current limiter v cc clamp same structure for all channels gnd ce ot1 ot2 ot3 ot4
3/11 VNQ500PEP-E table 4. absolute maximum ratings figure 3. configuration diagram (top view) figure 4. current and voltage conventions symbol parameter value unit v cc dc supply voltage 41 v -v cc reverse supply voltage -0.3 v - i gnd dc ground pin reverse current - 250 ma i out dc output current internally limited a - i out reverse dc output current -1 a i in dc input current +/- 10 ma v esd electrostatic discharge (r=1.5k w ; c=100pf) - i/on - outn & vcc 4000 5000 v v t j junction operating temperature internally limited c t stg storage temperature - 55 to 150 c 1 2 3 4 5 6 v cc output1 output3 output4 i/o3 i/o4 ce gnd 12 11 10 9 8 7 i/o1 i/o2 v cc output2 tab = v cc i s i gnd outputn v cc gnd i/on i outn i inn v inn v cc v outn ce i ce v ce
VNQ500PEP-E 4/11 table 5. thermal data note: (*) when mounted on fr4 printed circuit board with 0.5 cm 2 of copper area (at least 35 m thick) connected to all tab pins. electrical characteristics (8v 5/11 VNQ500PEP-E electrical characteristics (continued) table 9. protections figure 5. switching time waveforms: turn-on & turn-off figure 6. driving circuit symbol parameter test conditions min typ max unit v ol i/o low level default detection i in =1ma, latched thermal shutdown 0.5 v t tsd junction shut-down temperature 150 175 200 c i lim dc short circuit current v cc =13v; r load =10m w 0.4 0.9 a v demag turn-off output clamp voltage i out =0.25 a; l=50mh v cc -41 v cc -48 v cc -55 v t reset thermal latch reset time tj < t tsd (see figure 3 in waveforms) 10 m s t v out 90% 10% dv out /d t(off) dv out /d t(on ) 80% t v in t on t off t r t f mcu mcout n i/o n vnq500pep r prot (*) output n r prot (*) ce (*) see pag. 8 r prot (*) diagnostic feedback
VNQ500PEP-E 6/11 figure 7. truth table table 10. electrical transient requirements on v cc pin conditions mcoutn ce i/on outputn normal operation l h h h l h l h current limitation l h h h l h l h overtemperature l h h h l l (latched) l l undervoltage l h h h l h l l stand-by x l x l iso t/r 7637/1 test pulse test levels i ii iii iv delays and impedance 1 -25 v -50 v -75 v -100 v 2 ms 10 w 2 +25 v +50 v +75 v +100 v 0.2 ms 10 w 3a -25 v -50 v -100 v -150 v 0.1 m s 50 w 3b +25 v +50 v +75 v +100 v 0.1 m s 50 w 4 -4 v -5 v -6 v -7 v 100 ms, 0.01 w 5 +26.5 v +46.5 v +66.5 v +86.5 v 400 ms, 2 w iso t/r 7637/1 test pulse test levels results i ii iii iv 1cccc 2cccc 3acccc 3bcccc 4cccc 5c e e e class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
7/11 VNQ500PEP-E figure 8. waveforms mc outn 1) normal operation 2) undervoltage v cc v usd v usdhyst mc outn v outn v outn 3) shorted load operation i/o n i/o n mc outn i/o n t tsd t jn i outn ce ce ce t reset v ol
VNQ500PEP-E 8/11 figure 9. application schematic gnd protection network against reverse battery solution 1: resistor in the ground line (r gnd only). this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1) r gnd 600mv / (i s(on)max ). 2) r gnd 3 (- v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the devices datasheet. power dissipation in r gnd (when v cc <0: during reverse battery situations) is: p d = (-v cc ) 2 /r gnd this resistor can be shared amongst several different hsd. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not common with the device ground then the r gnd will produce a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift will vary depending on many devices are on in the case of several high side drivers sharing the same r gnd . if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the st suggests to utilize solution 2 (see below). solution 2: a diode (d gnd ) in the ground line. a resistor (r gnd =1k w) should be inserted in parallel to d gnd if the device will be driving an inductive load. this small signal diode can be safely shared amongst several different hsd. also in this case, the presence of the ground network will produce a shift ( j 600mv) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. this shift will not vary if more than one hsd shares the same diode/resistor network. load dump protection d ld is necessary ( voltage transient suppressor ) if the load dump peak voltage exceeds v cc max dc rating. the same applies if the device will be subject to transients on the v cc line that are greater than the ones shown in the iso t/r 7637/1 table. m c i/os protection: if a ground protection network is used and negative transient are present on the v cc line, the control pins will be pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the m c i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of m c and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of m c i/os. -v ccpeak /i latchup r prot (v oh m c -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = - 100v and i latchup 3 20ma; v oh m c 3 4.5v 5k w r prot 65k w . recommended r prot value is 10k w. v cc gnd output d gnd r gnd d ld m c +5v v gnd ce i/0n r prot r prot r prot diagnostic feedback
9/11 VNQ500PEP-E pr e limi n a r y package mechanical table 11. powersso-12? mechanical data figure 10. powersso-12? package dimensions symbol millimeters min typ max dim. mm. min. typ max. a 1.250 1.620 a1 0.000 0.100 a2 1.100 1.650 b 0.230 0.410 c 0.190 0.250 d 4.800 5.000 e 3.800 4.000 e 0.800 h 5.800 6.200 h 0.250 0.500 l 0.400 1.270 k 0o 8o x 1.900 2.500 y 3.600 4.200 ddd 0.100
VNQ500PEP-E 10/11 revision history table 12. revision history date revision description of changes oct. 2004 1 first issue.
11/11 VNQ500PEP-E information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com


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